View MAX1772_2021786.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

general description the MAX1772 is a highly-integrated, multichemistry battery-charger control ic that simplifies the construc- tion of accurate and efficient chargers. the MAX1772 uses analog inputs to control charge current and volt- age and can be programmed by the host or hardwired. high efficiency is achieved by a buck topology with synchronous rectification. maximum current drawn from the ac adapter is pro- grammable to avoid overloading the ac adapter when supplying the load and the battery charger simultane- ously. this enables the user to reduce the cost of the ac adapter. the MAX1772 provides outputs that can be used to monitor the current drawn from the ac adapter, battery-charging current, and the presence of an ac adapter. the MAX1772 can charge two to four lithium-ion (li+) series cells, easily providing 4a. when charging, the MAX1772 automatically transitions from regulating cur- rent to regulating voltage. it is available in a space-sav- ing 28-pin qsop package. applications notebook and subnotebook computers personal digital assistants hand-held terminals features input current limiting ?.5% output voltage accuracy using internal reference (0? to +85 c) programmable battery charge current >4a analog inputs control charge current and charge voltage monitor outputs for: current drawn from ac input source charging current ac adapter present up to 18.2v (max) battery voltage 8v to 28v input voltage >95% efficiency 99.99% (max) duty cycle for low-dropout operation charges any battery chemistry: li+, nicd, nimh, lead acid, etc. MAX1772 low-cost, multichemistry battery- charger building block ________________________________________________________________ maxim integrated products 1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 iinp cssp cssn bst dhi lx vctl dlov dlo pgnd csip csin batt cells ictl refin acok acin ichg gnd gnd ccv cci ccs ref cls ldo dcin qsop top view MAX1772 pin configuration 19-1772; rev 2; 5/02 ordering information part temp range pin-package MAX1772eei -40 c to +85 c 28 qsop for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
MAX1772 low-cost, multichemistry battery- charger building block 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v refin = 3.0v, v vctl = v ictl = 0.75 ? refin, cells = 2.0v, acin = 0, cls = ref, v bst - v lx = 4.5v, gnd = pgnd = 0, c ldo = 1?, ldo = dlov, c ref = 1?; pins cci, ccs, and ccv are compensated per figure 1a; t a = 0 c to +85 c, unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. dcin, cssp, cssn to gnd ...................................-0.3v to +30v bst to gnd ............................................................-0.3v to +36v bst to lx..................................................................-0.3v to +6v dhi to lx ....................................................-0.3v to (bst + 0.3v) lx to gnd .................................................................-6v to +30v batt, csip, csin to gnd........................................-0.3v to 20v csip to csin or cssp to cssn or pgnd to gnd ...........??..-0.3v to +0.3v cci, ccs, ccv, dlo, ichg, iinp, acin, ref to gnd ..............................-0.3v to (vldo + 0.3v) dlov, vctl, ictl, refin, cells, cls, ldo, acok to gnd ....................................-0.3v to +6v dlov to ldo.........................................................-0.3v to +0.3v dlo to pgnd ..........................................-0.3v to (dlov + 0.3v) ldo short-circuit current ..................................................50ma continuous power dissipation (t a = +70?) 28-pin qsop (derate 10.8mw/? above +70?).........860mw operating temperature range MAX1772eei ....................................................-40? to +85? junction temperature ........................................................150? storage temperature range .............................-60? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units supply and ldo regulator dcin input voltage range v dcin 8 28 v dcin falling 7.0 7.4 dcin undervoltage lockout trip point dcin rising 7.5 7.85 v dcin quiescent current i dcin 8.0v < v dcin < 28v 2.7 6.0 ma ldo output voltage 8.0v < v dcin < 28v, no load 5.25 5.40 5.55 v ldo load regulation 0 < i ldo < 10ma 34 100 mv ldo undervoltage lockout trip point v dcin = 8.0v 3.20 4.00 5.15 v ref output voltage 0 < i ref < 500a 4.072 4.096 4.120 v ref undervoltage lockout trip point ref falling 3.1 3.9 v trip points batt power_fail threshold v cssp falling 50 100 150 mv batt power_fail threshold hysteresis 100 200 300 mv acin threshold acin rising 2.007 2.048 2.089 v acin threshold hysteresis 0.5% of ref 10 20 30 mv acin input bias current v acin = 2.048v -1 +1 a cls input range 1.6 ref v cls input bias current v cls = 2.0v -1 +1 a switching regulator minimum off-time v batt =16.8v 1.00 1.25 1.50 s maximum on-time 5 10 15 ms oscillator frequency f osc (note 1) 400 khz
MAX1772 low-cost, multichemistry battery- charger building block _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v refin = 3.0v, v vctl = v ictl = 0.75 ? refin, cells = 2.0v, acin = 0, cls = ref, v bst - v lx = 4.5v, gnd = pgnd = 0, c ldo = 1f, ldo = dlov, c ref = 1f; pins cci, ccs, and ccv are compensated per figure 1a; t a = 0 c to +85 c, unless otherwise noted. typical values are at t a = +25 c.) parameter symbol conditions min typ max units dlov supply current i dlov dlo low 5 10 a bst supply current i bst dhi high 6 15 a lx input bias current v dcin = 28v, v batt = v lx = 20v 150 500 a lx input quiescent current v dcin = 0, v batt = v lx = 20v 0.3 1.0 a dhi maximum duty cycle 99.0 99.9 % dhi on-resistance high v bst - v lx = 4.5v, i dhi = +100ma 4 7 ? dhi on-resistance low v bst - v lx = 4.5v, i dhi = -100ma 1 2 ? dlo on-resistance high v dlov = 4.5v, i dlo = +100ma 4 7 ? dlo on-resistance low v dlov = 4.5v, i dlo = -100ma 1 2 ? v batt = 19v, v dcin = 0 5 batt input current i batt v batt = 2v to 19v, v dcin > v batt + 0.3v 200 500 a v dcin = 0 1 5 csip/csin input current v csip = v csin = 12v 800 a v dcin = 0 0.1 0.3 cssp/cssn input current v cssp = v cssn = v dcin > 8.0v 800 a batt/csip/csin input voltage range 0 19 v csip to csin full-scale current-sense voltage v batt = 12v 189 204 219 mv cssp to cssn full-scale current-sense voltage 189 204 219 mv error amplifiers gmv amplifier transconductance v c tl = re fin , v bat t = 16.8v , c e lls = ld o 0.0625 0.1250 0.250 s gmi amplifier transconductance ictl = refin, v csip - v csin = 150.4mv 0.5 1 2 s gms amplifier transconductance v cls = 2.048v, v cssp - v cssn = 102.4mv 0.5 1 2 s cci/ccs/ccv clamp voltage 0.25v < v ccv/s/i < 2.0v 150 300 600 mv current and voltage setting ictl = refin (see equation 2) -8 +8 charging-current accuracy ictl = refin/32 (see equation 2) -55 +55 % v vctl = v ictl = v refin = 3v -1 +1 ictl, vctl, refin input bias current v dcin = 0, v vctl = v ictl = v refin = 5v -1 +1 a ictl power-down mode threshold voltage refin /100 refin /55 refin /33 v
MAX1772 low-cost, multichemistry battery- charger building block 4 _______________________________________________________________________________________ electrical characteristics (continued) (v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v refin = 3.0v, v vctl = v ictl = 0.75 ? refin, cells = 2.0v, acin = 0, cls = ref, v bst - v lx = 4.5v, gnd = pgnd = 0, c ldo = 1f, ldo = dlov, c ref = 1f; pins cci, ccs, and ccv are compensated per figure 1a; t a = 0 c to +85 c, unless otherwise noted. typical values are at t a = +25 c.) parameter symbol conditions min typ max units v vctl = v refin (2, 3, or 4 cells) (see equation 1) -0.5 +0.5 battery-regulation voltage accuracy v vctl = v refin /20 (2, 3, or 4 cells) (see equation 1) -0.5 +0.5 % refin range 2.0 3.6 v refin undervoltage lockout 1.20 1.92 v ichg transconductance v ichg to (v csip - v csin ); v csip - v csin = 0.185v; v ichg = 0, 3.0v 0.95 1.00 1.05 s v csip - v csin = 0.185v -5 +5 ichg accuracy v csip - v csin = 0.05v -10 +10 % iinp transconductance v iinp to (v cssp - v cssn ); v cssp - v cssn = 0.185v; v iinp = 0, 3.0v (note 2) 0.85 1.00 1.15 s v cssp - v cssn = 0.185v -15 +15 iinp current accuracy v cssp - v cssn = 0.05v (note 2) -20 +20 % v cssp - v cssn = 0.08v, v cls = 1.6v -10 +10 cssp - cssn accuracy v cssp - v cssn = 0.2v, cls = ref -10 +10 % cssp + cssn input voltage range 8.0 28 v logic levels cells input low voltage 0.2 v cells input middle voltage 0.4 v ldo - 0.5 v cells input high voltage v ldo - 0.25 v ldo v cells input bias current cells = 0 or v ldo -10 +10 a acok sink current v acok = 0.4v 1 ma acok leakage current v acok = 5.5v -1 +1 a
MAX1772 low-cost, multichemistry battery- charger building block _______________________________________________________________________________________ 5 electrical characteristics (v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v refin = 3.0v, v vctl = v ictl = 0.75 ? refin, cells = 2.0v, acin = 0, cls = ref, v bst - v lx = 4.5v, gnd = pgnd = 0, c ldo = 1f, ldo = dlov, c ref = 1f; pins cci, ccs, and ccv are compensated per figure 1a; t a = -40 c to +85 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units supply and ldo regulator dcin input voltage range v dcin 8.0 28.0 v dcin falling 7 dcin undervoltage lockout trip point dcin rising 7.85 v dcin quiescent current i dcin 8.0v < v dcin < 28v 6 ma ldo output voltage 8.0v < v dcin < 28v, no load 5.25 5.65 v trip points batt power_fail threshold v cssp falling 50 150 mv batt power_fail threshold hysteresis 100 300 mv acin threshold acin rising 2.007 2.089 v acin threshold hysteresis 0.5% of ref 10 30 mv acin input bias current v acin = 2.048v -1 +1 a cls input range 1.6 ref v cls input bias current v cls = 2.0v -1 +1 a switching regulator minimum off-time v batt = 16.8v 1 1.5 s maximum on-time 5 15 ms oscillator frequency f osc (note 1) 400 khz dhi maximum duty cycle 99 % v batt = 19v, v dcin = 0 5 batt input current i batt v batt = 2v to 19v, v dcin > v batt + 0.3v 500 a v dcin = 0 5 csip/csin input current v csip = v csin = 12v 800 a v dcin = 0 0.3 cssp/cssn input current v cssp = v cssn = v dcin > 8.0v 800 a batt/csip/csin input voltage range 0 19 v csip to csin full-scale current-sense voltage v batt = 12v 189 219 mv cssp to cssn full-scale current-sense voltage 189 219 mv current and voltage setting ictl = refin (see equation 2) -8 +8 charging current accuracy ictl = refin/32 (see equation 2) -55 +55 % v vctl = v ictl = v refin = 3v -1 +1 ictl, vctl, refin input bias current v dcin = 0, v vctl = v ictl = v refin = 5v -1 +1 a
MAX1772 low-cost, multichemistry battery- charger building block 6 _______________________________________________________________________________________ electrical characteristics (continued) (v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v refin = 3.0v, v vctl = v ictl = 0.75 ? refin, cells = 2.0v, acin = 0, cls = ref, v bst - v lx = 4.5v, gnd = pgnd = 0, c ldo = 1f, ldo = dlov, c ref = 1f; pins cci, ccs, and ccv are compensated per figure 1a; t a = -40 c to +85 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units ictl power-down mode threshold voltage refin /100 refin /33 v v vctl = v refin (2, 3, or 4 cells) (see equation 1) -1 +1 battery regulation voltage accuracy v vctl = v refin /20 (2, 3, or 4 cells) (see equation 1) -1 +1 % refin range 2.0 3.6 v refin undervoltage lockout 1.92 v v csip - v csin = 0.185v -5 +5 ichg accuracy v csip - v csin = 0.05v -10 +10 % v cssp - v cssn = 0.185v -15 +15 iinp current accuracy v cssp - v cssn = 0.05v (note 2) -20 +20 % v cssp - v cssn = 0.08v, v cls = 1.6v -10 +10 cssp - cssn accuracy v cssp - v cssn = 0.2v, cls = ref -10 +10 % cssp + cssn input voltage range 8 28 v logic levels cells input low voltage 0.2 v cells input middle voltage 0.4 v ldo - 0.5 v cells input high voltage v ldo - 0.25 v ldo v cells input bias current cells = 0 or v ldo -10 +10 a acok sink current v acok = 0.4v 1 ma acok leakage current v acok = 5.5v -1 +1 a note 1: guaranteed by design. not production tested. note 2: tested under dc conditions. see text for more detail.
MAX1772 low-cost, multichemistry battery- charger building block _______________________________________________________________________________________ 7 typical operating characteristics (circuit of figure 1a, v dcin = 20v, t a = +25 c, unless otherwise noted.) v batt 20v/div i batt 2a/div cci 500mv/div ccv 500mv/div load-transient response (battery removal and reinsertion) MAX1772 toc01 1ms/div ictl = 0.957v vctl = 3.3v battery present cci ccv v batt 20v/div i load 2a/div ccs 500mv/div cci 500mv/div load-transient response (step-in load current) MAX1772 toc02 1ms/div ictl = 3.30v charging current = 2.0a v batt = 16v load step = 0 to 3a i source limit = 5a cci ccs v batt (ac-coupled) 100mv/div dcin 10v/div line-transient response MAX1772 toc03 2ms/div v batt = 16v dcin = 18.5v to 27.5v i load = 150ma -0.4 -0.2 -0.3 -0.1 0.2 0.3 0.1 0 0.4 0 2345 1 678910 ldo load regulation MAX1772 toc04 ldo current (ma) ldo error (%) vctl = 0 ictl = 3.3v dcin = 20.0v ldo = 5.40v
MAX1772 low-cost, multichemistry battery- charger building block 8 _______________________________________________________________________________________ -0.5 -0.2 -0.3 -0.4 -0.1 0 0.1 0.2 0.3 0.4 0.5 -40 10 -15 35 60 85 ref voltage error vs. temperature MAX1772 toc07 temperature ( c) ref voltage error (%) ictl = 0 vctl = 0 no load ref = 4.096v 100 0 0.1 1 10 100 1000 10,000 efficiency vs. battery current (voltage control loop) 20 MAX1772 toc08 batt current (ma) efficiency (%) 40 60 80 10 30 50 70 90 vctl = 0 ictl = 3.3v refin = 3.3v cell = 3 cell = 2 cell = 4 100 0 100 1000 10,000 efficiency vs. battery current (current control loop) 20 MAX1772 toc09 efficiency (%) 40 60 80 10 30 50 70 90 vctl = 0 ictl = 3.3v refin = 3.3v cell = 2 cell = 3 cell = 4 batt current (ma) typical operating characteristics (continued) (circuit of figure 1a, v dcin = 20v, t a = +25 c, unless otherwise noted.) -1.0 -0.6 -0.8 -0.2 -0.4 0.2 0 0.4 0.8 0.6 1.0 81620 12 24 28 ldo line regulation MAX1772 toc05 dcin (v) ldo error (%) ldo = 5.40v -0.20 -0.10 -0.15 -0.05 0.10 0.15 0.05 0 0.20 0 100 150 200 250 50 300 350 400 450 500 ref voltage load regulation MAX1772 toc06 ref current ( a) ref error (%) vctl = 0 ictl = 3.3v cell = 4 ref = 4.096v
MAX1772 low-cost, multichemistry battery- charger building block _______________________________________________________________________________________ 9 typical operating characteristics (continued) (circuit of figure 1a, v dcin = 20v, t a = +25 c, unless otherwise noted.) 0 0.010 0.005 0.020 0.015 0.030 0.025 0.035 0.045 0.040 0.050 0 1000 1500 500 2000 2500 3000 3500 4000 output v/i characteristics MAX1772 toc10 batt current (ma) batt voltage error (%) vctl = 0 ictl = 3.3v cell = 4 cell = 3 cell = 2 0 0.04 0.02 0.08 0.06 0.12 0.10 0.14 0.18 0.16 0.20 0 0.2 0.3 0.4 0.1 0.5 0.6 0.7 0.9 0.8 1.0 batt voltage error vs. vctl MAX1772 toc11 vctl/refin (%) batt voltage error (%) cell = 4 refin = 3.3v no load 0 1 2 4 3 5 0 0.4 0.2 0.6 0.8 0.1 0.5 0.3 0.7 0.9 1.0 current setting error vs. ictl MAX1772 toc12 ictl/refin (%) current setting error (%) batt > 2v refin = 3.3v 0 0.5 1.5 1.0 2.5 2.0 3.5 3.0 4.0 0 1000 1500 500 2000 2500 3000 3500 4000 ichg error vs. batt load current MAX1772 toc13 batt load current (ma) ichg error (%) vctl = 0 ictl = 3.3v cell = 4
MAX1772 low-cost, multichemistry battery- charger building block 10 ______________________________________________________________________________________ pin name function 1 dcin charging voltage input 2 ldo d evi ce p ow er s up p l y. outp ut of the 5.4v l i near r eg ul ator sup p l i ed fr om d c in . byp ass w i th a 1f cap aci tor . 3 cls source current-limit input. voltage input for setting the current limit of the input source. 4 ref 4.096v voltage reference. bypass with 1f to gnd. 5 ccs input current regulation loop compensation point. use 0.01f to gnd. 6 cci output current regulation loop compensation point. connect 0.01f to gnd. 7 ccv voltage regulation loop compensation point. connect 1k ? in series with 0.1f to gnd. 8, 9 gnd analog ground 10 ichg ichg is a scaled-down replica of the battery output current being sensed. it is used to monitor the charging current and indicates when the chip changes from voltage mode to current mode. the transconductance of (csip - csin) to ichg is 1s. connect ichg pin to gnd if it is unused. 11 acin ac detect input. detects when the ac adapter voltage is available for charging. 12 acok ac detect output. open-drain output is high when acin is less than ref/2. 13 refin reference input. allows the ictl and vctl pins to have ratiometric ranges for increased dac accuracy. 14 ictl input for setting maximum output current. range is refin/32 to refin. the device shuts down if this pin is forced below refin/55 (typ). 15 vctl input for setting maximum output voltage. range is 0 to refin. 16 cells trilevel input for setting number of cells. gnd = 2 cells, ldo/2 = 3 cells, ldo = 4 cells. 17 batt battery voltage input 18 csin output current-sense negative input 19 csip output current-sense positive input. connect a current-sense resistor from csip to csin. 20 pgnd power ground 21 dlo low-side power mosfet driver output. connect to low-side nmos gate. 22 dlov low-side driver supply 23 lx power connection for the high-side power mosfet driver. connect to source of high-side nmos. 24 dhi high-side power mosfet driver output. connect to high-side nmos gate. 25 bst power connection for the high-side power mosfet driver. connect a 0.1f capacitor from lx to bst. 26 cssn input current-sense for charger (negative input) 27 cssp input current-sense for charger (positive input). connect a current-sense resistor from cssp to cssn. 28 iinp iin p i s a scal ed - d ow n r ep l i ca of the i np ut cur r ent b ei ng sensed . it i s used to m oni tor the total system cur r ent. the tr anscond uctance of ( c s s p - c s s n ) to iin p i s 1m s . c onnect iin p p i n to gn d i f i t i s unused . pin description
MAX1772 low-cost, multichemistry battery- charger building block ______________________________________________________________________________________ 11 detailed description the MAX1772 includes all of the functions necessary to charge li+, nimh, and nicd batteries. a high-efficiency synchronous-rectified step-down dc-dc converter con- trols charging voltage and current. it also includes input source-current limiting and analog inputs for setting the charge current and charge voltage. the dc-dc con- verter uses external n-channel mosfets as the buck switch and synchronous rectifier to convert the input voltage to the required charging current and voltage. the typical application circuit shown in figure 1a uses a microcontroller (c) to allow control of charging cur- rent or voltage, while figure 1b shows a typical appli- cation with charging voltage and current fixed to specific values for the application. the voltage at ictl and the value of rs2 set the charging current. the dc- dc converter generates the control signals for the external mosfets to regulate the voltage and the cur- rent set by the vctl, ictl, and cells inputs. the MAX1772 features a voltage-regulation loop (ccv) and two current-regulation loops (cci and ccs). the ccv voltage-regulation loop monitors batt to ensure that its voltage never exceeds the voltage set by vctl. the cci battery current-regulation loop monitors cur- rent delivered to batt to ensure that it never exceeds the current limit set by ictl. a third loop (ccs) takes control and reduces the battery-charging current when the sum of the system load and the battery-charging current exceeds the charging source current limit set by cls. setting the battery regulation voltage the MAX1772 uses a high-accuracy voltage regulator for charging voltage. the vctl input adjusts the bat- tery output voltage. vctl is allowed to vary from 0 to refin ( 3.3v). the per-cell battery termination voltage is a function of the battery chemistry and construction; thus, consult the battery manufacturer to determine this voltage. the battery voltage is calculated by the equa- tion: cells is the programming input for selecting cell count. table 1 shows how cells is connected to charge 2, 3, or 4 cells. use a voltage-divider from ldo to set the desired voltage at cells. the internal error amplifier (gmv) maintains voltage regulation (figure 2). the voltage error amplifier is com- pensated at ccv. the component values shown in figure 1 provide suitable performance for most appli- cations. individual compensation of the voltage regula- tion and current-regulation loops allow for optimal com- pensation. setting the charging-current limit the ictl input sets the maximum charging current. the current is set by current-sense resistor rs2, connected between csip and csin. the nominal differential volt- age between csip and csin is 204mv; thus, for a 0.05 ? sense resistor, the maximum charging current is 4a. battery-charging current is programmed with ictl using the equation: the input range for ictl is refin/32 to refin ( 3.3v). the device shuts down if ictl is forced below refin/55 (typical). the current at ichg is a scaled- down replica of the battery output current being sensed across csip and csin. when choosing the current-sense resistor, note that the voltage drop across this resistor causes further power loss, reducing efficiency. however, adjusting ictl to reduce the voltage across the current-sense resistor may degrade accuracy due to the input offset of the current-sense amplifier. the charging current-error amplifier (gmi) is compensated at cci. a 0.01f capacitor at cci provides suitable performance for most applications. setting the input current limit the total input current (from a wall cube or other dc source) is a function of the system supply current and the battery-charging current. the input current regula- tor limits the source current by reducing the charging current when the input current exceeds the set input current limit. system current will normally fluctuate as portions of the system are powered up or put to sleep. without input current regulation, the input source must be able to supply the maximum system current and the maximum charger input current. by using the input cur- rent limiter, the current capability of the ac wall adapter may be lowered, reducing system cost. the MAX1772 limits the current drawn by the charger when the load current becomes high. the device limits the charging current, so the ac adapter voltage is not loaded down. an internal amplifier compares the volt- age between cssp and cssn to the voltage at cls. v cls can be set by a resistor-divider between ref and gnd. connect cls to ref for maximum input current limiting. i v rs2 v v 2 chg ref ictl refin = () 1 20 v ells v vv v 1 batt ref ref vctl refin =+ ? ? ? ? ? ? ? ? ? ? ? ? () c 10
MAX1772 low-cost, multichemistry battery- charger building block 12 ______________________________________________________________________________________ figure 1a. ?-controlled typical application circuit dcin MAX1772 cls ref gnd cells dlov v in 8vdc to 28vdc dhi d3 bst smart battery host acin d4 r6 59.0k ? r7 19.6k ? c5 1 f vctl ictl refin acok ichg iinp r8 1m ? r9 15.4k ? r10 12.4k ? c14 0.1 f c20 0.1 f ccv c11 0.1 f r5 1k ? cci ccs c10 0.01 f c9 0.01 f c12 1 f c1 22 f c2 22 f c13 1 f c15 0.1 f lx c16 1.0 f ldo r13 33 ? cssp cssn d1 c7 o.47 f c6 o.47 f r14 4.7 ? r15 4.7 ? rs1 0.04 ? n1 l1 22 h rs2 0.05 ? csip r11 1 ? csin r12 1 ? pgnd dlo n2 d2 c18 0.1 f c19 0.1 f batt c3 22 f c4 22 f batt + r20, r21, r22 10k ? avdd/ref scl sda temp batt- a/d input a/d input d/a output d/a output vcc scl sda a/d input gnd pgnd gnd to external load digital input
MAX1772 low-cost, multichemistry battery- charger building block ______________________________________________________________________________________ 13 figure 1b. stand-alone typical application circuit to external load dcin MAX1772 cls ref gnd cells dlov v in 8vdc to 28vdc dhi d3 bst battery acin d4 r6 59.0k ? r7 19.6k ? c5 1 f acok ichg iinp r8 1m r9 15.4k ? r10 12.4k ? c14 0.1 f c20 0.1 f ccv c11 0.1 f r5 1k ? cci ccs c10 0.01 f c9 0.01 f c12 1 f c1 22 f c2 22 f c13 1 f c15 0.1 f lx c16 1.0 f ldo r13 33 ? cssp cssn d1 c7 o.47 f c6 o.47 f r14 4.7 ? r15 4.7 ? 3.30v 910 ? 1.5k ? rs1 0.04 ? n1 l1 22 h rs2 0.05 ? csip r11 1 ? csin r12 1 ? pgnd dlo n2 d2 c18 0.1 f c19 0.1 f batt c3 22 f c4 22 f batt + refin vctl batt- 3.30v ictl r19 29.4k ? r20 10k ? r21 10k ? r22 10k ?
MAX1772 low-cost, multichemistry battery- charger building block 14 ______________________________________________________________________________________ figure 2. functional diagram MAX1772 driver bst dhi lx level shifter gnd gnd driver dlov dlo pgnd lvc dc-dc converter ichg logic block refin ictl 1/55 ldo ref dcin 4.096v reference 5.4v linear regulator acin acok ref/2 srdy ccs cls cssp cssn level shifter gms iinp csip csin ictl cci level shifter gmi 204mv refin x - vos cells cell select logic 409mv refin x - ccv vctl gmv r1 batt
MAX1772 low-cost, multichemistry battery- charger building block ______________________________________________________________________________________ 15 the input source current is the sum of the device cur- rent, the charger input current, and the load current. the device current is minimal (6ma) in comparison to the charge and load currents. the actual source cur- rent required is determined as follows: where is the efficiency of the dc-dc converter (85% to 95% typ). v cls determines the reference voltage of the gms error amplifier. sense resistor rs1 sets the maximum allowable source current. calculate the maximum cur- rent as follows: once the input current limit is reached, the charging current is tapered back until the input current is below the desired threshold. when choosing the current-sense resistor, note that the voltage drop across this resistor causes further power loss, reducing efficiency. ac adapter detection connect the ac adapter voltage through a resistive divider to acin to detect when ac power is available, as shown in figure 1. acok is an open-drain output and is high when acin is less than ref/2. current measurement use ichg to monitor the battery-charging current being sensed across csip and csin. the output volt- age range is 0 to 3v. the voltage of ichg is proportion- al to the output current by the equation: where i chg is the battery-charging current, g ichg is the transconductance of ichg (1ms typ), and r9 is the resistor connected between ichg and ground. connect ichg pin to ground if it is not used. use iinp to monitor the system input current being sensed across cssp and cssn. the output voltage range is 0 to 3v. the voltage of iinp is proportional to the output current by the equation: where i source is the dc current being supplied by the ac adapter power, g iinp is the transconductance of iinp (1ms typ), and r10 is the resistor connected between iinp and ground. in the typical application circuit, duty cycle affects the accuracy of v iinp (figure 3). ac load current also affects accuracy (figure 4). connect iinp pin to ground if it is not used. ldo regulator ldo provides a 5.4v supply derived from dcin and can deliver up to 15ma of current. the mosfet drivers are powered by dlov and bst, which must be con- nected to ldo as shown in figure 1. ldo also supplies the 4.096v reference (ref) and most of the control cir- cuitry. bypass ldo with a 1f capacitor. dc-to-dc converter the MAX1772 employs a buck regulator with a boot- strapped nmos high-side switch and a low-side nmos synchronous rectifier. dc-dc controller the control scheme is a constant off-time variable fre- quency, cycle-by-cycle current mode. the off-time is constant for a given batt voltage. it varies with v batt operation; a maximum on-time of 10ms allows the con- troller to achieve >99% duty cycle with continuous con- duction. figure 5 shows the controller functional diagram. mosfet drivers the low-side driver output dlo swings from 0 to dlov. dlov is usually connected through a filter to ldo. the high-side driver output dhi is bootstrapped off lx and swings from v lx to v bst . when the low-side driver turns on, bst rises to one diode voltage below dlov. filter dlov with a resistor-capacitor (rc) circuit whose cutoff frequency is about 50khz. the configuration in figure 1 introduces a cutoff frequency of around 48khz: f = 1/2 rc = 1 / (2 ? 33 ? ? 0.1f) = 48khz (7) v iinp source iinp = () irsgr 1106 v9 ichg chg ichg = () irsg r 25 i source_max cls = () () vrs /20 1 4 i i i 3 source load charge batt in =+ () () [] () vv / table 1. cell-count programming table cell cell count v cells < 0.20v 2 0.40v < v cells < v ldo -0.5v 3 v ldo - 0.25v < v cells < v ldo 4
MAX1772 low-cost, multichemistry battery- charger building block 16 ______________________________________________________________________________________ dropout operation the MAX1772 has 99.99% duty-cycle capability with a 10ms maximum on-time and 1s off-time. this allows the charger to achieve dropout performance limited only by resistive losses in the dc-dc converter compo- nents (d1, n1, rs1, rs2) (figure 1). the actual dropout voltage is limited to 100mv between cssp and csin by the power-fail comparator. compensation each of the three regulation loops the input current limit, the charging current limit, and charging voltage limit can be compensated separately using the ccs, cci, and ccv pins, respectively. the charge-current-loop error-amp output is brought out at cci. likewise, the source current error-amp out- put is brought out at ccs; 0.01f capacitors to ground at cci and ccs compensate the current loops in most charger designs. raising the value of these capacitors reduces the bandwidth of these loops. the voltage-regulating-loop error-amp output is brought out at ccv. compensate this loop by connecting a series rc network from ccv to gnd. recommended values are 1k ? and 0.1f. the zero set by the series rc increases midfrequency gain to provide phase compensation. the pole at ccv is set by the capacitor and the voltage error-amp output impedance at low fre- quencies to integrate the dc error. component selection table 2 lists the recommended components and refers to the circuit of figure 1. the following sections describe how to select these components. mosfets and schottky diodes schottky diode d1 provides power to the load when the ac adapter is inserted. this diode must be able to deliver the maximum current as set by rs1. the n-channel mosfets (n1, n2) are the switching devices for the buck controller. high-side switch n1 should have a current rating of at least 8a and have an on-resistance (r ds(on) ) of 50m ? or less. the driver for n1 is powered by bst; its current should be less than 10ma. select a mosfet with a low total gate charge (q gate ) and determine the required drive current by i gate = q gate ? f (where f is the dc-dc converter s 400khz maximum switching frequency). the low-side switch (n2) should also have a current rat- ing of at least 8a, have an r ds(on) of 100m ? or less, and a total gate charge less than 10nc. n2 is used to provide the starting charge to the bst capacitor (c15). during normal operation, the current is carried by schottky diode d2. choose a schottky diode capable of carrying the maximum charging current. d3 is a signal-level diode, such as the 1n4148. this diode provides the supply current to the high-side mosfet driver. inductor selection inductor l1 provides power to the battery while it is being charged. it must have a saturation current of at least 4a plus 1/2 of the current ripple ( ? i l ): i sat = 4a + (1/2) ? i l (8) figure 3. iinp accuracy vs. v dcin / v batt -10 0 10 20 30 0 1.0 1.5 0.5 2.0 2.5 3.0 3.5 5.0 4.5 4.0 i rs1 (a) iinp accuracy (%) v dcin = 16v v batt = 8.2 v dcin = 16v v batt = 12.3 v dcin = 18v v batt = 16.4 figure 4. iinp accuracy vs. ac load duty cycle -6 -5 -4 -3 -2 -1 0 02030 10 40 50 60 70 80 duty cycle (%) iinp accuracy (%) 1a frequency 2a ac load ac adapter rs1 MAX1772 freq = 125khz freq = 50khz freq = 250khz
MAX1772 low-cost, multichemistry battery- charger building block ______________________________________________________________________________________ 17 figure 5. dc-to-dc converter functional diagram imax reset 4.0v 0.25v 0.1v 10ms lvc control cells setv seti ccv cci ccs gms gmi gmv cls dlo dhi csi 1 s bst s rq ccmp zcmp imin chg rq s css cssp dcin cssn bst dhi lx rs1 ldo c bst l1 rs2 dlo csip csin c out batt battery MAX1772 q cell select logic
MAX1772 low-cost, multichemistry battery- charger building block 18 ______________________________________________________________________________________ the controller determines the constant off-time period, which is dependent on batt voltage. this makes the ripple current independent of input and battery voltage, and it should be kept to less than 1a. calculate ? i l with the following equation: (9) higher inductor values decrease the ripple current. smaller inductor values require high saturation current capabilities and degrade efficiency. typically, a 22h inductor is ideal for all operating conditions. current-sense input filtering in normal circuit operation with typical components, the current-sense signals can have high-frequency tran- sients that exceed 0.5v due to large current changes and parasitic component inductance. to achieve prop- er battery and input current compliance, the current- sense input signals should be filtered to remove large common-mode transients. the input current-limit sens- ing circuitry is the most sensitive case due to large cur- rent steps in the input filter capacitors (c6, c7) in figure 1. use 0.47f ceramic capacitors from cssp and cssn to ground. smaller 0.1f ceramic capacitors (c18, c19) can be used on the csip and csin inputs to ground since the current into the battery is continu- ous. place these capacitors next to the single-point ground directly under the MAX1772. layout and bypassing bypass dcin with a 1f to ground (figure 1). d4 pro- tects the MAX1772 when the dc power source input is reversed. a signal diode for d4 is adequate because dcin only powers the ldo and the internal reference. bypass ldo, bst, dlov, and other pins as shown in figure 1. good pc board layout is required to achieve specified noise, efficiency, and stable performance. the pc board layout artist must be given explicit instructions prefer- ably, a pencil sketch showing the placement of the power switching components and high current routing. refer to the pc board layout in the MAX1772 evaluation kit for examples. a ground plane is essential for optimum performance. in most applications, the circuit will be located on a multilayer board, and full use of the four or more copper layers is recommended. use the top layer for high current connections, the bottom layer for quiet connections (ref, ccv, cci, ccs, dcin, and gnd), and the inner layers for an uninterrupted ground plane. use the following step-by-step guide: 1) place the high power connections first, with their grounds adjacent: minimize the current-sense resistor trace lengths, and ensure accurate current sensing with kelvin connections. minimize ground trace lengths in the high current paths. minimize other trace lengths in the high current paths. use >5mm wide traces. connect c1 and c2 to high-side mosfet (10mm max length). lx node (mosfets, rectifier cathode, inductor (15mm max length)). ideally, surface-mount power components are flush against one another with their ground terminals almost touching. these high-current grounds are then connected to each other with a wide, filled zone of top-layer copper, so they do not go through vias. the resulting top-layer subground plane is connect- ed to the normal inner-layer ground plane at the output ground terminals, which ensures that the ic s analog ground is sensing at the supply s output terminals without interference from ir drops and ground noise. other high current paths should also be minimized, but focusing primarily on short ground and current-sense connections eliminates about 90% of all pc board layout problems. 2) place the ic and signal components. keep the main switching node (lx node) away from sensitive analog components (current-sense traces and ref capacitor). important: the ic must be no further than 10mm from the current-sense resistors. keep the gate drive traces (dhi, dlo, and bst) shorter than 20mm, and route them away from the current-sense lines and ref. place ceramic bypass capacitors close to the ic. the bulk capacitors can be placed further away. place the current-sense input filter capacitors under the part, connected directly to the gnd pin. 3) use a single-point star ground placed directly below the part. connect the input ground trace, power ground (subground plane), and normal ground to this node. ? i vs lh l = () 21
MAX1772 low-cost, multichemistry battery- charger building block ______________________________________________________________________________________ 19 chip information transistor count: 2733 process: s12 table 2. component list designation description c1, c2, c3, c4 22f, 35v low-esr tantalum capacitors avx tpse226m035r0300 or sprague 593d226x0035e2w c5 1f, 50v ceramic capacitor (1210) murata grm42-2x7r105k050 c6, c7 0.47f, 25v ceramic capacitors (1210) murata grm42-2x7r474k050 c9, c10 0.01f ceramic capacitors (0805) c12, c13 1f, 10v ceramic capacitors (0805) taiyo yuden lmk212bj105mg c11, c14, c15, c16, c18, c19, c20 0.1f, 50v ceramic capacitors (0805) taiyo yuden umk212bj104mg or murata grm40-034x7r104m050 d1 schottky diode (dpak) stm-microelectronics stps8l30b or on semiconductor mbrd630ct or toshiba u5fwk2c42 d2 30v, 3a schottky diode nihon ec31qs03l d3, d4 100ma schottky diodes (sot23) central semiconductor cmpsh-3 or hitachi hrb0103a l1 22h power inductor sumida cdrh127-220 designation description n1 n-channel mosfet international rectifier irf7805 or fairchild fds6680 n2 n-channel mosfet fairchild fds6612a rs1 0.04 ? 1%, 1w resistor dale wsl-2512-r040-f or irc lr2512-01-r040-f rs2 0.05 ? 1%, 1w resistor dale wsl-2512-r050-f or irc lr2512-01-r050-f r5 1k ? 5% resistor (0805) r6 59.0k ? 1% resistor (0805) r7 19.6k ? 1% resistor (0805) r8 1m ? 5% resistor (0805) r9 15.4k ? 1% resistor (0805) r10 12.4k ? 1% resistor (0805) r11, r12 1 ? 5% resistors (0805) r13 33 ? 5% resistor (1206) r14, r15 4.7 ? 5% resistors (1206) r19 29.4k ? 1% resistor (0805) r20, r21, r22 10k ? 1% resistors (0805)
MAX1772 low-cost, multichemistry battery- charger building block maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 20 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2002 maxim integrated products printed usa is a registered trademark of maxim integrated products. qsop.eps package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)

▲Up To Search▲

Price & Availability of MAX1772

	To Download MAX1772 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .